Open Access

Origins of domain wall pinning in ferroelectric nanocapacitors

  • Yunseok Kim1, 2Email author,
  • Hee Han3,
  • Ionela Vrejoiu2, 5,
  • Woo Lee3,
  • Dietrich Hesse2 and
  • Marin Alexe2, 4
Nano Convergence20141:24

DOI: 10.1186/s40580-014-0024-4

Received: 31 March 2014

Accepted: 29 May 2014

Published: 12 September 2014


We have investigated domain wall pinning and its origins in ferroelectric nanocapacitors using piezoresponse force microscopy. Domain wall pinning of two different types was observed in the nanocapacitors. The first type of pinning originates from local point defects similar to previous reports. The second one originates from immobile local defects in the place of pristine domains. In both cases, pinning and de-pinning processes were observed without significant domain wall bowing. The results can be helpful to understand domain wall motion and improve the reliability of nanoscale ferroelectric memory devices.

1 Correspondence/Findings

Polarization switching of ferroelectrics proceeds via nucleation and subsequent lateral domain wall motion [1],[2]. Since the polarization switching underpins fundamental operational mechanisms of multiple applications such as ferroelectric data storage [3] and ferroelectric tunneling barriers [4],[5], there have been extensive studies on it. Hence, the understanding of nucleation and subsequent domain wall motion is important for practical applications.

It has been reported that nucleation of ferroelectric domains occurs at pre-determined sites in the vicinity of structural defects [1]. After the nucleation, the domain wall propagates under the influence of the applied electric field [1],[6],[7]. However, its motion can be influenced by the existing local defects as well [8]. That is, domain wall movement can be pinned by local defects. Nonetheless, when an electric field higher than the energy barrier for pinning is applied, the bowing of pinned domain walls can occur at the points of the local defects. This is the case for microcapacitors. Although there are many pinning sites in microcapacitors, the overall switching behavior still follows the general switching behavior, in which the switched area keeps increasing under the applied electric field, because there is plenty of room for the moving domain walls.

However, on considerably decreasing the capacitor size, one local defect may significantly influence the overall domain wall motion. In fact, recent study [7] has shown that the domain wall in nanocapacitors propagates in contact with the capacitor boundary, along which local defects are likely to be present to a larger extent hindering the domain wall motion. Thus, the domain wall pinning can become a more important issue as the capacitor size decreases, and this is directly relevant to the reliability of the device performance. However, to our best knowledge, domain wall pinning has not been reported so far in nanocapacitors of such size that can be feasible for high-memory density devices.

Here, we show an unusual domain wall pinning in ferroelectric nanocapacitors and explore its origin using piezoresponse force microscopy (PFM).

Initially, we switched pristine domain structures of nanocapacitors as upwards. This process is referred to as background poling. After the background poling, a series of +2 V pulses with different pulse widths was applied to generate downward polarized domain inside the background poled capacitor. Then, PFM measurements were carried out over the area. As previously reported [1],[6],[7], the domain wall after the nucleation propagates on increasing the pulse width. However, the domain wall motion is occasionally hindered as shown in Figure 1(a). The normalized switched area temporarily remains constant at a value of around 0.5 [pinning: blue arrows of Figure 1(a)], and then starts to increase again [de-pinning: red arrows of Figure 1(a)] under the applied electric field. This pinning/de-pinning phenomenon was observed only for relatively low amplitude of the applied bias [see for contrast the green solid line of Figure 1(a), plotting data for higher pulse amplitude of 2.5 V]. It has been well known that the pinning procedure is dependent on local point defects, which can hinder the movement of a domain wall [6],[8],[9]–[11] and could exist in principle anywhere inside the capacitors [1],[12]. However, if there is enough energy is provided to overcome the barrier height imposed by the defects, the domain wall can move through these defects, i.e., a de-pinning phenomenon occurs. As a result, the domain wall motion strongly depends on the correlation between the applied bias pulses and the barrier height of the local defect states. The data of Figure 1(a) demonstrates this behavior.
Figure 1

Pulse width dependent switched behavior. (a) Pulse width dependence of the normalized switched area on the pulse amplitudes of +1.5 V (red circle), +2.0 V (black square), and +2.5 V (green inverse-triangle), respectively, in 70-nm-diameter PZT capacitors. The solid lines are guides for the eye. (b, c) PFM phase images (top) and their schematic domain structures (bottom) of instantaneous domain configurations developing at different pulse widths under applied biases of +2 V (after an initial background poling to the upward polarization) for pristine (b) mono-downward and (c) multi-polarized capacitors. The blue (red) arrows of (a) indicate the pinning (de-pinning) points. The blue solids of (b) and dashed lines of (b) and (c) indicate defect and capacitor boundary, respectively.

This switching behavior results can also be illustrated through the PFM phase images shown in Figure 1(b). On increasing pulse width, the domain wall moves from the top side to the bottom side of capatiro imaged in this figure. However, at the middle point [see blue circle in Figure 1(b)], the domain wall motion temporarily ceases, and then the wall moves again towards the bottom part of the figure, till the initial downward polarization state of the capacitor is fully recovered (as marked by the blue-dotted circle). In this case, we believe that there is a local point defect at the center of the capacitor similar to previous reports [6],[8],[9]–[11].

However, we also observed a different type of domain wall hindrance as shown in Figure 1(c) for another nanocapacitor. In this case, intriguingly, the domain wall motion and the pinning seem to follow the pristine domain structure underlying the nanocapacitor. The domain wall is first pinned at the center of the capacitor [see blue solid line in the schematics of Figure 1(c): 20 ms], which is close to the domain boundary of the pristine domains. After the de-pinning, the right part of the domain wall moves [see blue solid line in the schematics of Figure 1(c): 200 ms] and then the whole region of the capacitor is finally switched to a downward polarization. This domain wall propagation seems to have a particular relationship with the pristine domain structure. The pristine domain structure shows three distinct sections of domains (upper half part: downward polarization, left lower quarter part: upward polarization, and right lower quarter part: mixed of up- and downward polarization). Even though there are pinning and de-pinning processes, pronounced bowing was not observed in both cases.

In order to explore the origin of the observed domain wall propagation, we further examined the relation between the switching behavior and the pristine domain structure through averaged piezoresponse hysteresis loop analysis [9],[10]. Figure 2 shows piezoresponse hysteresis loops and the corresponding histograms of coercive voltage in dependence on the pristine domain structure of the capacitors. The average switching behavior of ferroelectric nanocapacitors was described previously [13]. For the mono-upward (downward) polarized capacitors, there is a positive (negative) bias voltage shift in the coercive voltage as well as in the hysteresis loops. However, the hysteresis loop of the multi-polarized capacitors, which is rather similar to the average hysteresis loop for all measured capacitors [see blue down triangles curve in Figure 2(a)], is on the intermediate between two different mono-polarized capacitors. Interestingly, multi-polarized capacitors have both positively and negatively biased voltage shifts, which can be concluded from the two separate peaks at around +/−0.6 V and +/−1.0 V, respectively. The locally different shift originates from local domain structures inside these capacitors [14]. Accordingly, the averaged hysteresis loop of all measured is located between the hysteresis loops of mono-upward and downward polarized capacitors [see Figure 2(a), blue down triangles curve]. The observed phenomena can be explained as follows. Multi-domain structures in epitaxial ferroelectric thin films can occur to minimize the energy of the depolarization field or release the stored elastic energy [15]–[19]. This multi-domain formation depends on the mechanical constraints between the film and the bottom electrodes [15]–[17] and/or on the amount of the screen charges [18],[19]. The mechanical constraints related to interfacial defects can lead to different stress distributions of individual domains [15],[16], which can lead to a local imprint behavior of the switching properties [20]. The locally different distribution of defects, such as oxygen vacancies, at the ferroelectric/bottom electrode interfaces or at the surface of the ferroelectric can also affect the switching behavior [21]–[24].
Figure 2

Averaged piezoresponse hysteresis loops. (a) Averaged piezoresponse hysteresis loops and (b) histogram of coercive voltage V C in dependence on the pristine domain structure in different PZT nanocapacitors: mono-downward (red), mono-upward (blue), and multi-polarized (green) capacitors. The mono-upward (downward) polarized capacitors have a positive (negative) bias voltage shift.

We believe that these local defects at the interfaces/surfaces still remain even after disappearance of pristine domain boundary through the background poling process. Hence, the remained immobile defects in the place of the pristine domain can influence domain wall motion even during the switching experiment. The pristine PFM images of Figure 1(c) show three different domain configurations. The upper half of the capacitor shows fully penetrated downward polarization, the left lower quarter of the capacitor shows upward polarization, and the right lower quarter of the capacitor shows a non-penetrated mixed domain region, which is mixed of up- and downward polarizations. As previously shown in Figure 2, the mono-downward polarized capacitors have a lower positive coercive voltage (V C + ) compared to the mono-upward polarized one. Thus, if this switching behavior is applicable to the multi-polarized capacitors, the nucleation can preferentially occur at the edge of the pristine downward-polarized region under the positive bias pulse. Then, the domain wall can propagate until it touches the domain boundary at the center (upper half part) of the capacitor. In other words, the domain wall can be temporarily pinned at the center of the capacitor. When a positive bias pulse of sufficient width is applied to the capacitor, the domain wall first can move into the right lower part of the capacitor due to the mixed domains of up- and downward polarizations, whereas the left part of the domain wall still does not move at all. Finally, the whole region of the capacitor can be switched into a downward polarization. This scenario agrees well with the experimental results of Figure 1(c). However, as mentioned above, we believe that there are different origins for the domain wall pinning for Figure 1(b) and (c). Indeed, the pristine domain structure of Figure 1(b) is of mono-downward polarization. It indicates that the immobile local defect in the place of the pristine domains do not significantly contribute to the domain propagation in the nanocapacitor of Figure 1(b).

A similar behavior as in Figure 1(c) was also observed by the direct observations of the domain switching on the larger BFO nanocapacitors in Figure 3. The pristine BFO nanocapacitors in Figure 3(a) and (b) show complex multi-polarized domain structures. After applying bias pulses increasing width from 100 μs to 40 ms at +3 V, the whole region of the capacitors could be completely switched into the opposite direction. Then, when the opposite biases of −3 V for 40 ms were applied to the same capacitors, the domain switching clearly started from the downward polarized regions inside the capacitors.
Figure 3

Switching behavior dependent on pristine domain structures. (a, b) PFM phase (left) and amplitude (right) images of 380 nm-diameter-BFO nanocapacitors with two different pristine domain structures: (1) pristine and (2, 3) poled states under applied biases of (2) -3 V and (3) +3 V for 40 ms. The blue dashed lines indicate the location of the studied capacitors. Scale bar is 120 nm.

In order to further analyze the dependence of the switching behavior on the local defects in the place of the pristine domain structure, each individual hysteresis loop was additionally analyzed as presented in Figure 4. For the multi-polarized capacitors, more than 80% of the capacitors show slanted hysteresis loops [see curves consisting of red circles, blue inverse-triangles, and green triangles of Figure 4(a)]. On the contrary, more than 80% of the capacitors show square-like hysteresis loops for the mono-polarized capacitors [see red filled circles and black filled rectangles of Figure 4(b)]. Some of the loops in the multi-polarized capacitors show a kink on the hysteresis loop. These kinks can be clearly visualized by their fine structure, which can be obtained from the first derivative of the hysteresis loop, as shown in the inset of Figure 4(b) [10]. The mono-polarized capacitors of Figure 4(b) usually do not have any shoulders in their fine structure, whereas the multi-polarized capacitors of Figure 4(a) have single or multiple shoulders in their fine structure. These shoulders of the fine structure can be related to the presence of the random-field type defects [10]. However, the shoulders in the fine structure can originate from the local imprint of the nanocapacitors as well, on the basis of the observations in Figures 2 and 3. Therefore, the domain wall pinning in the direct observations and the fine structure can be related to both origins of the local point defects and the immobile local defects in the place of the pristine domain structures.
Figure 4

Individual piezoresponse hysteresis loops of the PZT nanocapacitors with (a) multi- and (b) mono-polarized domain structures. The insets show their fine structure (i.e., first derivative of the hysteresis loop).

In summary, we have investigated domain wall pinning and its origins in ferroelectric nanocapacitors using piezoresponse force microscopy. Similar to previous reports, the observed domain wall pinning was observed due to the existence of local point defects. However, we also observed another type of the pinning source, i.e., pristine domain structures. It was found that the steps of the domain wall propagation are dependent on the pristine domain structure because locally different defect states in the place of the pristine domains can affect the domain wall motion. In both cases, pinning and de-pinning processes were observed without observation of significant domain wall bowing. The observed results can provide further information on the domain wall motion in nanocapacitors and could improve the reliability of nanoscale ferroelectric memory devices.

2 Experimental section

Pulsed-laser deposition was employed to fabricate 35-nm-thick epitaxial Pb(Zr0.2Ti0.8)O3 (PZT) thin films and 90-nm-thick epitaxial BiFeO3 (BFO) ones on epitaxially grown Pt (001)/MgO (001) and SrRuO3 (001)/SrTiO3 (001) single-crystal substrates, respectively [7],[25]. Nanocapacitors from both PZT and BFO thin films were fabricated by evaporating 15-25-nm-thick Pt top electrodes at room temperature through an ultra-thin anodic aluminium oxide stencil mask [26]. The diameters of the PZT and BFO nanocapacitors were about 70 nm and 380 nm, respectively. PFM measurements were carried out under ambient conditions using a commercial atomic force microscope (XE-100, Park Systems) combined with a lock-in amplifier (SR830, Stanford Research Systems). The piezoresponse images were routinely obtained with an ac voltage of 0.15-0.3 V rms at 6.5-25 kHz applied to a conductive probe (ATEC-EFM, Nanosensors).

Author’s contributions

YK carried out the experiments and drafted the manuscript. HH, IV, WL, DH, and MA prepared the samples. YK, WL, DH, and MA participated in its design and coordination. All authors discussed the results and commented on the manuscript. All authors read and approved the final manuscript.



Piezoresponse force microscopy







Y.K. acknowledges the financial support of the Alexander von Humboldt Foundation. Part of this work was supported by the German Research Foundation (DFG) via SFB 762.

Authors’ Affiliations

School of Advanced Materials Science and Engineering, Sungkyunkwan University (SKKU)
Max Planck Institute of Microstructure Physics
Korea Research Institute of Standards and Science (KRISS)
Department of Physics, University of Warwick
Present address: Max Planck Institute for Solid State Research


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© Kim et al.; licensee Springer. 2014

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