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Figure 7 | Nano Convergence

Figure 7

From: Synthesis, properties and potential applications of two-dimensional transition metal dichalcogenides

Figure 7

Electronic device applications. (a) A thin film MoS2 EDLT constructed with an ion gel on a rigid substrate [22]. (b) Transfer and output characteristics of the MoS2 EDLT. VD is the drain voltage, and VG is the gate voltage. Specific capacitance and phase angle of the ion-gel/MoS2 interface capacitor as a function of the applied frequency [22]. (c) Schematic ilustration for single-layer MoS2 FET device [24]. (d) Drain-source current Ids through the MoS2 single-layer transistor measured as a function of the top gate voltage Vtg (upper graph). Drain-source current Ids as a function of drain-source voltage for different values of Vtg (lower graph) [22].

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