Table 1 Overview of experimental results of negative capacitance field effect transistors
Refs. no. | Baseline device | Internal metal layer | Ferroelectric material | Minimum subthreshold slope (mV/decade) | Purpose |
|---|---|---|---|---|---|
[17] | MOSFET (Lg = 1 μm) | Yes | P(VDF0.75–TrFE0.25) | 18 | First experimental demonstration of steep switching feature |
[19] | FinFET (Lg = 100 nm) | Yes | BiFeO3 | 8.5 | Experimental demonstration of negative capacitance FinFET |
[20] | MOSFET (Lg = 1 μm) | Yes | P(VDF0.75–TrFE0.25) | 45 | Hysteresis-free negative capacitance FET by controlling the drain voltage |
[25] | FinFET (Lg = 30 nm) | Yes | HfZrO2 | 55 | Negative capacitance FinFET with integrated 5 nm thick hafnium-based ferroelectric layer |
[22] | MOSFET (Lg = 10 μm) | No | PbZr0:52Ti0:48O3 | 13 | Integration of 100 nm-thick PZT ferroelectric layer in MOSFET |
[26] | FinFET (Lg = 70 nm) | Yes | Pb(Zr0.2Ti0.8)O3 | 6.8 | Hyeresis reduction by adjusting the FinFET’s layout parameter |
[42] | MOSFET (Lg = 30 μm) | No | HfZrOx | 40.8 | Integration of 1.5 nm-thick HZO ferroelectric layer in MOSFET |
[27] | FinFET (Lg = 14 nm) | No | Si:HfO | 54 | Doped Hf ferroelectric material with 3 ~ 8 nm thickness, which is integrated in FinFET |
[30] | MoS2 2D FET (Lg = 1 μm) | Yes | HfZrO2 | 6.07 | 2D negative capacitance FET with integrated hafnia ferroelectric layer |