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Table 2 The device dimensions of baseline FDSOI device/FinFET vs. the hysteresis of FE-FDSOI/FE-FinFET

From: Study of a hysteresis window of FinFET and fully-depleted silicon-on-insulator (FDSOI) MOSFET with ferroelectric capacitor

Gate length × width (nm × nm)Forward VFerroelectric (V)Reverse VFerroelectric (V)Hysteresis (V)
FE-FDSOI
 1000 × 801.14− 0.351.49
 1000 × 851.35− 0.451.80
 1000 × 1051.38− 0.672.05
FE-FinFET
 180 × 200.50− 0.480.98
 180 × 2501.36− 0.982.34
 5000 × 201.79− 1.142.93