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Fig. 14 | Nano Convergence

Fig. 14

From: High-performance printed electronics based on inorganic semiconducting nano to chip scale structures

Fig. 14

Electronic circuits and systems developed using printed inorganic nano/micro scale structures: (ac) 3D NW circuit integration and system [42]. a 3D NW circuit is fabricated by the iteration of the contact printing, device fabrication, and separation layer deposition steps N times. b Optical image of inverters (layer 1) and floating gate memory (layer 2) on Kapton. c DC inverter characteristics. Inset shows functional devices on flexible Kapton substrate. di Heterogeneous NW assembly for an all integrated, sensor circuitry [43]. d Circuit diagram for the all-NW PD, with high-mobility Ge/Si NW-FETs (T1 and T2) amplifying the photo response of a CdSe nanosensor. e Schematic of the all-NW optical sensor circuit based on ordered arrays of Ge/Si and CdSe NWs. f An optical image of the fabricated NW circuitry, consisting of a CdSe nanosensor [(C1), and (C2)] and two Ge/Si core/shell NW-FETs [(C3) and (C4)] with channel widths ≈ 300 µm and 1 µm, respectively. Each device element within the circuit can be independently addressed for dynamics studies and circuit debugging. g Circuit output current (blue curve) and voltage divider output voltage (grey curve) response to light illumination (4.4 mW/cm2). h Optical image of an array of all-NW PD circuitry with each circuit element serving as an independently addressable pixel. i A defect analysis map showing the functional and defective NW PD circuit elements. j Array of pressure sensors on a flexible substrate, with active matrix addressing using printed arrays of semiconductor nanowires (7 cm × 7 cm with a 19 × 18 pixel array). k Measured response of the device under compression in the geometry of a ‘C’ character. The blue pixels represent defects. Reprinted with permission from Ref [189]

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