Fig. 2

a A Pt/HfSiOx/TaN memristor device image. b Typical current–voltage (I–V) curves showing the forming, reset and set operations, c Repeated DC switching cycles totaling 120 throughout set and reset procedures. (d) Endurance performance over 1000 cycles. 200 cycles of the e,f set and reset voltages were distributed statistically. g Properties of retention at RT h Log-log scale was used to fit the I–V curve. i Schottky emission-fitted High HRS high field area. Inset of Fig. h,i, indicate that the R-square values are greater than 99.9%