Graphene nanoribbon devices at high bias
© Han and Kim; licensee Springer 2014
Received: 5 November 2013
Accepted: 7 November 2013
Published: 20 February 2014
We present the electron transport in graphene nanoribbons (GNRs) at high electric bias conduction. When graphene is patterned into a few tens of nanometer width of a ribbon shape, the carriers are confined to a quasi-one-dimensional (1D) system. Combining with the disorders in the system, this quantum confinement can lead into a transport gap in the energy spectrum of the GNRs. Similar to CNTs, this gap depends on the width of the GNR. In this review, we examine the electronic properties of lithographically fabricated GNRs, focusing on the high bias transport characteristics of GNRs as a function of density tuned by a gate voltage. We investigate the transport behavior of devices biased up to a few volts, a regime more relevant for electronics applications. We find that the high bias transport behavior in this limit can be described by hot electron scattered by the surface phonon emission, leading to a carrier velocity saturation. We also showed an enhanced current saturation effect in the GNRs with an efficient gate coupling. This effect results from the introduction of the charge neutrality point into the channel, and is similar to pinch-off in MOSFET devices. We also observe that heating effects in graphene at high bias are significant.
The discovery of graphene  has enabled intense fundamental and applied research activities in this novel two-dimensional (2D) carbon based electronic system. Electron transport in graphene is substantially different from that of conventional 2D electronic systems owing to the linear energy dispersion relation near the charge neutrality point (Dirac point) in the electronic band structure [2, 3]. This unique band structure is fundamentally responsible for the distinct electronic properties of carbon nanotubes (CNTs) . When graphene is patterned into a narrow ribbon, and the carriers are confined to a quasi-one-dimensional (1D) system, we expect the opening of an energy gap. Earlier theoretical work showed that this energy gap depends on the width and crystallographic orientation of the graphene nanoribbon (GNR) [5–7], similar to CNTs. The first experimental work on GNRs [8–10] has shown that a transport gap can indeed be open up by patterning graphene into nanometer size ribbons or constrictions. The resulting transport gap formation can be most simply attributed to quasi-onedimensional (1D) confinement of the carriers, which induces an energy gap in the single particle spectrum [5–7],[11–13]. Detailed experimental studies of disordered graphene nanoribbons (GNRs) [14–20], however, suggest that this observed transport gap may not be a simple band gap. In an effort to explain these experimental results, various theoretical explanations for the transport gap formation in disordered graphene nanostructures have been proposed, including models based on Coulomb blockade in a series of quantum dots , Anderson localization due to edge disorder [22–24], and a percolation driven metal-insulator transition . In order to distinguish between these different scenarios, systematic experiment including treatment of both disorder induced localization and electron-electron interaction is required.
In our recent experiment , we carried out systematic studies of the scaling of the transport gap in GNRs of various dimensions. From this scaling of several characteristic energies with GNR width (W) and length (L), we find evidence of a transport mechanism in disordered GNRs based on hopping through localized states whose size is close to the GNR width. We found that At the charge neutrality point, a length-independent transport gap forms whose size is inversely proportional to the GNR width. In particular, we found that in this gap, electrons are localized, and charge transport exhibits a transition between thermally activated behavior at higher temperatures and variable range hopping at lower temperatures. By varying the geometric capacitance, we find that charging effects constitute a significant portion of the activation energy.
Extending this earlier work, in this review, we examine the electronic properties of lithographically fabricated GNRs with widths in the tens of nanometers. Here we investigate the transport behavior of devices biased up to a few volts, a regime more relevant for electronics applications. We will first address characteristics of graphene at high bias which are not specific to graphene nanoribbons, then we address GNRs at high bias specifically. Graphene devices operated at high source-drain bias show a saturating I−V characteristic. This decrease in conductivity at high applied electric field is described by carrier velocity saturation due to optical phonon emission. This result is analogous to the high bias results obtained CNTs. In a well known experiment, Yao et. al. found that current in metallic single wall carbon nanotubes saturates at high electric field. Their result is explained in terms of zone-boundary optical phonon emission from high energy electrons. At high electric fields, a steady-state population is developed between right and left moving charge carriers with a maximum energy difference corresponding to the phonon energy. A slightly different behavior was reported in semiconducting single wall carbon nanotubes by Chen and Fuhrer . In these devices, current does not saturate completely, and the transport is described by an electric field dependent carrier velocity. The authors fit their data with a model based on a carrier velocity that saturates to a constant value at high electric field and a carrier density dependent on the local potential along the device. They find a saturation velocity of 2 × 107 cm/s in their device. These results demonstrate the feasibility of 1D GNR devices for electronic applications with a proper bandgap engineering.
Graphene nanoribbon fabrication
Once a suitable piece of graphene has been deposited and identified using the procedure described above, the next step is to electrically contact the graphene with metal electrodes using e-beam lithography. We begin by spinning on a layer of poly(methyl methacrylate) (PMMA) e-beam resist and baking on a hotplate at 180°C for 2 minutes. Then we use e-beam lithography to write a 2 mm by 2 mm grid of alignment marks at roughly the location of the graphene, and develop in a solution of methyl isobutyl ketone:isopropal alcohol (MIBK:IPA) 1:3 for 5–10 seconds. This quick development leaves alignment mark “holes” in the PMMA, which we use for alignment in the following e-beam lithography step, eliminating the need for metal alignment mark deposition or another PMMA spin step. Electrodes are patterned in this PMMA layer with e-beam lithography, using an optical image of the sample with the alignment mark holes for design and alignment. Thermal evaporation is then used to deposit 1–2 nm of chrome and 25–50 nm of gold, and the chip is placed in acetone overnight at room temperature for lift-off (Figure 1(b)).
Once the graphene has been successfully contacted with Cr/Au electrodes, we create an etch mask to define the nanoribbons. A negative tone e-beam resist, hydrogen silsesquioxane (HSQ) (2% in MIBK) is spun on to the chip (at 4000 rpm, for a typical film thickness of 14 nm). We use HSQ as the resist for this step because a negative resist is ideal for creating a small etch mask, and because with HSQ we can obtain small feature sizes. The etch mask is written at a relatively high e-beam dose (1300 μC/cm 2 for the ribbons in our 30 keV system, with lower doses for larger features) and developed in a solution of 0.26N tetramethylammonium hydroxide (TMAH) in water for 1 minute (Figure 1(c)).
After defining the etch mask, the graphene is ready to be etched. The device is exposed to oxygen plasma in a Technics reactive ion etcher (RIE) with 200 mTorr O 2 at 50 W for 5–10 seconds. These conditions etch graphene at a rate of about one layer per second, so that unprotected single layer and few-layer graphene are etched away cleanly (Figure 1(d)). The finished device (Figure 2) is then ready to be wirebonded and measured.
The devices measured in this experiment are back-gated and dual-gated etched graphene devices. Graphene devices often fail or change drastically and irreversibly when the current density per unit width exceeds a threshold of ∼2 mA/μm. We operate the device at currents below this threshold. Current-voltage characteristics at varying gate voltages were measured for 17 ribbon devices with a range of widths and lengths, and three “wide” devices with W = 200 nm, in order to compare to the behavior of non-ribbon devices.
Saturating behavior fits a velocity saturation model
In its limiting forms, Equation 5 for the current qualitatively gives the behavior seen in Figure 4. At low V b , current is linear in V b with a conductivity WC g V 0 μ 0/L, determined by the low field mobility, as expected. At high V b , current is again linear in V b , but now with a conductivity of WC g v sat /2 and an offset determined by the gate voltage. At low fields, the variation in carrier density is small and the linear I–V results from the linear form of v d (E)≈μ 0 E in this regime. At high fields, v d approaches a constant value v sat , and the linear dependence of the carrier concentration on V b is responsible for an I–V characteristic approaching linear behavior. Note this is in contrast to the case of carbon nanotubes, where there are a set number of conducting channels, so that the current saturates with the drift velocity.
Converting V g to E F involves the value of V CNP , which commonly drifts throughout measurement due to changes in adsorbed molecules and positions of trapped charges. Here the black circles correspond to conversion of V g to E F using V CNP = −15 V, the same value used in Equation 5 for the original fit. Red triangles represent a conversion to E F using V CNP = −8 V so that the a linear fit of v sat vs.intersects the origin.
This form of the mobility results in the expression for the drift velocity v d = μ E given in Equation 1. For electrons and holes in graphene, which have a constant carrier velocity of v F , drift velocity can be understood as the time averaged velocity of carriers when scattering is taken into account.
Using this expression with v F =108 cm/s [2, 3], we obtain a value ofmeV from the linear fit (dashed line) in Figure 6(b). This is well below the value of the longitudinal zone-boundary phonon for graphene, which hasmeV . We suggest that our measured phonon energy corresponds to the SiO2 surface phonon energymeV [29–31], although we note that values measured in other ribbon devices of different geometries vary widely (from ≈22 meV to ≈120 meV), possibly due to discrepancies in determining the relevant device geometry, the corresponding capacitance, and the position of the charge neutrality point.
Top-gated graphene devices show an enhanced current saturation effect
The “kink” effect in graphene is similar to pinch-off in traditional MOSFETs, where a strong bias voltage pulls the quasi-Fermi level at one end of the channel into the charge-depleted bandgap. In graphene, where there is no bandgap, this results in a transition within the channel from one carrier type (electrons or holes) to the other. In a device that is n-type, as in Figure 8(c)(I), a positive source-drain voltage (applied to the source) depletes the electron density in the channel near the source (II). At sufficiently strong positive bias voltage, the bias voltage begins to pull holes into the channel, so a region of the channel is at charge neutrality and contributes a large resistance (III). As bias is further increased, hole density at the source also increases, so conductivity increases again (IV). In Reference  we showed that wide plateaus in current could be achieved when this “kink” effect is made to coincide with velocity saturation.
Heating effects can overcome transport gap at high bias
The results discussed above come from graphene nanoribbons measured at high bias, but the key features of the data, saturation velocity at strong electric fields and the “kink” effect in the current for top-gated devices, are also seen in wide graphene devices . This leads to the question, how are nanoribbons different from wide, non-ribbon devices when operated at high bias? Here we present the preliminary results of a comparison between dual-gated ribbons and wide devices and so far find no major differences in their performance. This result is only preliminary because the widths of the GNRs in this experiment are not well specified within the range of W≈ 20–60 nm. The widths of nanoribbons lying underneath the dielectric and metal layers cannot be accurately measured in this device geometry. Estimates of the width can be made based on the expected width dependence of the low-temperature transport characteristics Δ m and Δ V b from the analysis in earlier work . From these comparisons, it is estimated that the ribbons used in this experiment have W≈50 nm. Ribbons of this width are narrow enough to behave distinctly from “wide” (nm) devices at low temperatures and low bias, but as we shall see below, they may not be narrow enough show a difference in transport characteristics at high bias. Ribbons as narrow as W≈ 15–20 nm are achievable by our fabrication methods, so measurements of narrower devices with larger transport gaps may still reveal distinct device behavior.
In comparing gapped graphene nanoribbons to wide graphene with no gap, there are several differences we may expect to see. First, since graphene nanoribbons have a strongly suppressed current at energies inside the gap, we may see an increased transconductance. Also, we could see larger and more fully saturated current in the “kink” region, as the presence of a gap causes the “kink” to more closely resemble pinch-off in a traditional MOSFET. We may also see the effects of edge roughness. In narrow ribbons where edge roughness constitutes a significant portion of the total ribbon width, this could lead to a decrease in maximum current carrying capabilities, or cause the devices to degrade more quickly.
To understand the similarity in behavior between 50 nm and 200 nm wide devices, we compare the gap size of the ribbon device with the relevant thermal effects in the system; if the available thermal energy in the system is larger than the gap, the effect of the gap will be washed out by thermally activated charge carriers. In earlier work , we found that there are three different ways to measure the size of the gap: Δ m , from the gate voltage, Δ V b , from the bias voltage, and E a , from the activation energy for nearest neighbor hopping. Here we are concerned with current flow at high bias, so Δ V b is the most relevant of these scales for distinguishing the on and off states of the device, though E a will determine the leakage current in the off state. For the 500 nm long devices studied here, these values are similar. Since Δ V b has a strong length dependence, if we wish to increase Δ V b we can increase the device length L, with the trade-off of an increased the resistance and therefore a decreased current.
If heating effects raise the device temperature above room temperature, then heating effects will be more relevant than ambient temperature effects. Several recent works [33–35] address the topic of heating in graphene at high bias. From the ribbon device data in Figure 9(a), we can expect to see dissipated electrical power P=I V of up to ≈350 kW/cm2, though power dissipation may be lower in the optimal operating regime for device applications. From the results in Reference  for temperature vs. power per area, this power dissipation corresponds to a temperature of 1350 K, or a thermal energy of 116 meV. From this it is clear that the thermal energy from heating greatly exceeds that from the ambient temperature, but this result was from a back-gated device. In a dual-gated device geometry, the top-gate dielectric and electrode may act as a heat sink and decrease the effect of heating.
The gate dielectric actually used in the experiment consists of HSQ/ HfO2 with thicknesses of 15/15 nm. Hafnium dioxide has a much higher thermal conductivity than silicon dioxide (23 W/m·K for HfO2 versus 1.4 W/m·K for SiO2). When the model is changed to include the proper layer thicknesses of each dielectric, the maximum nanoribbon temperature decreases to 680 K, which corresponds to an energy of 59 meV. This is the behavior we can expect to see in the actual device measured in Figures 9 and 10. From Figure 11 it is clear that E a and Δ V b are both far below this energy, so thermally activated carriers easily wash away any gap-related effects we might have seen in the transport at high bias.
Heat sinking could be greatly improved by removing the HSQ, such as by an hydrofluoric acid etch, and depositing ≈15 nm of hafnia only as the dielectric. In this geometry, the dielectric would be thinner and more thermally conductive, allowing for more efficient heat dissipation to the metal top gate. For the same heating conditions, this device construction would result in a maximum nanoribbon temperature of 460 K. The corresponding energy, 40 meV, is a gap size easily achievable by our nanoribbon fabrication methods. We note that from the results in our earlier work , the addition of a top gate tends to decrease E a , but as the top-gated geometry provides very good heat sinking, and top gates will ultimately be needed for optimized device design, we see this as the best route for development of a graphene nanoribbon device that retains its gapped behavior at high bias.
In this review we have described a saturating I–V characteristic in graphene devices operated at high source-drain bias, and described the behavior using a model where surface phonon emission results in a carrier velocity that saturates to a Fermi energy dependent value at high applied electric field. We showed that for top-gated graphene devices have an enhanced current saturation effect at certain gate voltage combinations. This effect results from the introduction of the charge neutrality point into the channel, and is similar to pinch-off in MOSFET devices. We observe that heating effects in graphene at high bias are significant, and very narrow ribbons with a strongly heat sinking device design are required to produce a device where confinement-induced gap effects dominate over the effects of heating.
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